1) Field of the Invention
This invention relates generally to fabrication of semiconductor devices and more particularly to a process for etching metal with an in-situ plasma cleaning step.
2) Description of the Prior Art
In semiconductor fabrication, circuit elements or devices are typically connected by patterned metal layers. Metal gates are also increasingly formed from patterned metal layers. The patterned metal layers are typically formed by photolithography and etching. During etching polymers form on the metal sidewalls. The photoresist mask and polymer formations on the metal sidewalls are difficult to remove. When the metal etching source gasses include both CHF.sub.3 and N.sub.2 polymers form easily on the chamber walls as well as the metal sidewalls. Typically multiple wet etching cycles are required to adequately remove the polymers.
The importance of overcoming the various deficiencies noted above is evidenced by the extensive technological development directed to the subject, as documented by the relevant patent and technical literature. The closest and apparently more relevant technical developments in the patent literature can be gleaned by considering: U.S. patents:
U.S. Pat. No. 5,759,916 (Hsu et al.) discloses a method for forming a void free TiN anti-reflective coating on aluminum containing, conductor layer and patterning using a conventional etching process. PA1 U.S. Pat. No. 5,767,015 (Tabara) discloses a W-plug etch back using SF.sub.6 and N.sub.2 and switching to a chlorinated gas before exposing the Al alloy layer to prevent AlF.sub.3 formation which makes photoresist removal difficult. PA1 U.S. Pat. No. 5,599,742 (Kadomura) discloses a method of coating Al sidewalls with a sulpher nitride to prevent corrosion. PA1 U.S. Pat. No. 5,540,812 (Kadomura) discloses a method of etching an Al layer using a Cl or Br compound followed by an etch using a compound containing S and F to deposit S on Al sidewalls. PA1 U.S. Pat. No. 5,451,293 (Tabara) discloses a method of ashing using O.sub.2, an H and O containing gas, and a F containing gas to remove resist after etching. PA1 U.S. Pat. No. 5,378,653 (Yanagida) discloses a method of forming an Al-based pattern using a post-etch processing step using CF.sub.4 and O.sub.2 to remove a sidewall protection film.